The SSI Logic Design Team Page

Assembled by design expertise below are the members of our team. A click on our images will load our individual pages
Our team supports the knowledge base in our website, works as resident experts for clients, and teams on projects
It is an honored to be considered for our expertise. Please feel free to contact sales to get in touch with us

Verilog RTL Designers

Matthew BSEE
19 years Verilog exp.
DSP Algorithm Specialist
Steveg BSEE
17 years Verilog design exp.
Network Datapath and Control
Edward MSEE
24 years test design exp.
DFT Architect
Steven BSBA
17 years ASIC design exp.
Design Center Manager

DSP Networking Test Top Level

Edward MSEE
24 years test design exp.
DFT Architect
Victor BSEE
15 years test design exp.
DFT Engineer

Edward Timothy Mattw

Physical Designers

Anthony BSEE
18 years ASIC exp.
DC Synthesis Expert
Dan MSEE
28 years ASIC exp.
Physical Design Expert
Timothy BSEE
15 years ASIC exp.
Floorplanning and Layout Expert

Robert Dan George

Signal Integrity

Mr. U MSEE
23 years SI Experience
Signal Integrity Expert

Mr. U Richard Manium

Circuit Designers

Cactus Analog Designs MSEE+
22+ years in Analog Circuit Design
DACs, AMPs, Vregs
Mobility PHd+
12+ years in HSpeed Circuit Design
ADCs, PHYs, I/Os
Mr. Bob MSEE
24 years in Circuit Design
Converters, timing, SERDES

Analog Design High Speed Interfaces Timing and I/O